Cadence is a pivotal leader in electronics and system design, building upon more than 30 years of computational software expertise. They are looking for a Junior Engineer intern to join their dynamic team, where the intern will create verification flow collaterals and develop Python Apps for verifications.
Responsibilities
Review, maintain and add new Verification flow collaterals / scripts
Learn how to apply Cadence Verification solutions to real RTL designs.
Review and update customer training labs design and script
Bring up new designs (ex: RISC-V) and expand customer training materials and labs.
Bring up new designs (ex: RISC-V) and expand customer training materials and labs.
Learn Cadence Verification platform python APIs and APP store.
Brainstorm what Python APP to build/add to improve verification flow
Brainstorm if AI/ML can be applied to the APP
Write draft spec.
Cowork with others to write Python Apps.
Write clean, well-documented, and efficient code.
Participate in code reviews.
Debug and troubleshoot software issues.
Collaborate with other engineers to design and implement new features.
Contribute to the improvement of our software development processes.
Present your work - flow, collaterals and APPs that was built.
Record short training videos
Qualification
Required
Currently enrolled in BS or MS with a major in Computer Engineering, Computer Science, Electrical Engineering or a related field
Proficiency in Verilog / System Verilog / SVA / Python
Experience with ASIC design or verification flow
Strong problem-solving skills
Presentation, communication and teamwork skills
Preferred
Benefits
Cadence is a pivotal leader in electronics and system design, building upon more than 30 years of computational software expertise.
